MULTIPROCESSORS AND SHARED MEMORY FOR ULTIMATE FLEXIBILITY
When you design your system to utilize multiple processor boards (MPU-A) sharing the same physical memory, you simply order the Shared Memory Facility (SMF). The SMF is a low-cost facility allowing up to six processors to communicate via a shared memory, and allowing any processor to access several shared memory systems. I/O interfaces can also be shared when selected as memory addresses instead of port numbers.
Each processor is allowed up to 64K bytes of its own local memory, less the amount of memory in the shared block. The shared memory may be up to 64K bytes.
The SMF includes:
Both boards are connected to a special Mother Board section (Shared Memory Bus) in a standard IMSAI 8080 chassis. Memory boards shared by the processors are also plugged into this section.
The SMF is completed by Bus boards plugged into the Mother Board of each processor, and cables connecting the Bus boards to the MABP-3 boards on the Shared Memory Bus.
A separate front panel may be connected (through an extender board) to each processor. The processors may be contained in separate cabinets connected only by the Bus board and associated cable.
Access Port Board MABP-3
This bus multiplexer board consists of three identical ports used to switch information between one of three processors and the Shared Memory Bus. Two MABP-3 boards are used to make a six-way switch controlled by the MAPT-6 Shared Memory Controller board.
The MABP-3 board contains three complete sets of logic, each comprising an address decoder, request latch and bus buffers. When two boards are used in a system, they provide a six-way bus switch in which the six processor ports differ only in their priority assigned on the MAPT-6 board.
To any processor, then, access to information in shared memory is the same as access to any other memory space except that it may need to wait while the SMF services higher priority requests.
An EXPM edge connector is needed to install each MABP-3 board.
Shared Memory Controller Board MAPT-6
This board performs timing and control functions of the Shared Memory Facility. Logic includes a latched priority encoder which generates the signal PORT SELECT I, where I is the processor presently with highest priority. This signal enables related bus drivers on the MABP-3 boards to perform bus switching.
Other logic elements form a sequential logic network to generate signals controlling the memory. These signals include SYNC, which substitutes for the SYNC signal normally generated by the processor during a fetch cycle, and which may be used for other system functions.
An EXPM edge connector is needed to install the MAPT-6 board.
Bus Board BB
Each processor sharing memory requires a Bus Board and cable to connect its bus to the MABP-3 board. Order either an 8-inch cable (BB CABLE-8) or 18-inch cable (BB CABLE-18), depending on the length required.
An EXPM edge connector is needed to install each Bus board.
8-inch Cable BB CABLE-8
This 8-inch flat cable, with 50-pin edge connectors, connects a Bus board to a MABP-3 board.
18-inch Cable BB CABLE-18
This 18-inch flat cable, with 50-pin card edge connectors, is used to connect a Bus board to a MABP-3 board when a BB CABLE-8 unit is not long enough.
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